#ifndef S3V_PCIIDS_H
#define S3V_PCIIDS_H

#define PCI_VENDOR_S3			0x5333
#define PCI_CHIP_VIRGE			0x5631
#define PCI_CHIP_TRIO			0x8811
#define PCI_CHIP_TRIO64UVP		0x8814
#define PCI_CHIP_VIRGE_VX		0x883D
#define PCI_CHIP_TRIO64V2_DXGX		0x8901
#define PCI_CHIP_Trio3D			0x8904
#define PCI_CHIP_VIRGE_DXGX		0x8A01
#define PCI_CHIP_VIRGE_GX2		0x8A10
#define PCI_CHIP_Trio3D_2X		0x8A13
#define PCI_CHIP_VIRGE_MX		0x8C01
#define PCI_CHIP_VIRGE_MXPLUS		0x8C02
#define PCI_CHIP_VIRGE_MXP		0x8C03

#endif /* S3V_PCIIDS_H */
